In recent years, an arithmetic processing system using a central processing unit (CPU) and a field-programmable gate array (FPGA) is applied in various information processing fields including a data retrieval processing and a moving picture processing. For example, an FPGA accelerator is used for high-speed data processing and low-power data processing as a search processing of search engines on the Internet, a moving picture processing of high efficiency video coding (HEVC: H.265) or the like. For example, since the FPGA can be accelerated by pipelining and parallelization as long as a circuit resource permits, the FPGA is widely used for the search processing, the moving picture processing or the like.
Herein, the FPGA is, for example, an integrated circuit of which configuration can be set up by a purchaser or a designer after manufacturing and it is possible to asynchronously arrange and execute tasks of a plurality of users on one FPGA by utilizing a function of dynamic reconfiguration/partial reconfiguration of the FPGA. For example, even when a user is operating a recording circuit for streaming video on a virtual private server (VPS), and another user sitting next to the user places and executes a database search circuit, it is possible to assure the performance of both users. Further, the task of one user may well be executed.
Related techniques are disclosed in, for example, Japanese Laid-Open Patent Publication Nos. 2005-124130, 2015-230619, and 2007-179358.